DSpace Collection: La divulgación en Dadun puede ser tenida en cuenta y afectar negativamente a la patentabilidad futura de resultados incluidos en la presentación. Si el investigador o su grupo prevén que los resultados expuestos en la presentación, o parte de ellos, pueden ser o serán objeto de una solicitud de patente posterior no deberán incorporar dicha presentación en Dadun. En tal caso se le recomienda consultar con el ICT la manera más adecuada de procederLa divulgación en Dadun puede ser tenida en cuenta y afectar negativamente a la patentabilidad futura de resultados incluidos en la presentación. Si el investigador o su grupo prevén que los resultados expuestos en la presentación, o parte de ellos, pueden ser o serán objeto de una solicitud de patente posterior no deberán incorporar dicha presentación en Dadun. En tal caso se le recomienda consultar con el ICT la manera más adecuada de procederhttps://hdl.handle.net/10171/232052024-03-29T08:36:41Z2024-03-29T08:36:41ZA high accuracy 3.1V voltage limiter for enabling high performance RFID sensor applications.https://hdl.handle.net/10171/686982024-02-05T06:06:12Z2019-01-01T00:00:00ZTitle: A high accuracy 3.1V voltage limiter for enabling high performance RFID sensor applications.
Abstract: This paper presents a low power voltage limiter design that avoids possible damages in the analog front-end of a RFID sensor due to voltage surges whenever the tag gets close to the reader. The proposed voltage limiter design takes advantage of the implemented bandgap reference block in order to provide a highly accurate limiting voltage in spite of temperature variation and process dispersion. The measured limiting voltage is 3.1V while showing a low current consumption of 100nA when the reader and the tag are far away, so that the sensitivity of the tag is not impacted due to an undesired consumption in the voltage limiter. The circuit is implemented in a low cost 180nm CMOS technology.2019-01-01T00:00:00ZDesign of a wireless and batteryless heart rate monitor.https://hdl.handle.net/10171/686922024-02-05T06:06:09Z2017-01-01T00:00:00ZTitle: Design of a wireless and batteryless heart rate monitor.
Abstract: This paper presents the design of a wireless and batteryless heart rate monitor. The measurement is done using a single-lead ECG raw signal. The design is based on a commercial ultra low power microcontroller, an optimized full-custom RF Front-End, a ultra low power Threshold Comparator and a Programmable Gain Amplifier implemented in commercial 90 nm CMOS. The communications are compliant with the ISO 11784/11785 HDX standard. The complete design consumes only 15 mu W and the heart rate measurement is done in only 3.2 seconds. A comparison with the best literature approach demonstrate that presented design is a 45% more efficient in terms of energy.2017-01-01T00:00:00Z