A methodology and framework to assist in the architecture design and functional verification of complex electronic systems.
Palabras clave : 
Transaction Level Modeling (TLM).
Assertion-based Verification (ABV).
Model-driven Design (MDD).
Automatic code generation.
SystemC.
Fecha de publicación : 
22-oct-2013
Fecha de la defensa: 
12-jul-2013
Resumen
An integrated, powerful and flexible development environment has been created in this research work in order to simulate and verify electronic systems starting from a very high abstraction level. The system architecture design, the algorithm tuning and the functional verification can be performed efficiently early in the development process by means the proposed contributions.

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Koldo_Tomasena.pdf
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